Semiconductor device

ABSTRACT

A semiconductor device includes a semiconductor substrate, a channel layer, a Schottky layer, a first layer having a narrower band gap than the Schottky layer, a second layer having band discontinuity with the Schottky layer, a gate electrode, an n+ layer, a source electrode, and a drain electrode. The first and second layers are within the Schottky layer, and the second layer is disposed on the first layer.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor device such as ametal-semiconductor field effect transistor and a pseudomorphic highelectron mobility transistor.

2. Background Art

Schottky gate field effect transistors such as a metal-semiconductorfield effect transistor (hereinafter referred to as MESFET), apseudomorphic high electron mobility transistor (hereinafter referred toas PHEMT) and the like using GaAs or InP are used as high frequencytransistors used in a microwave band to a milliwave band. These deviceshave been known to undergo elemental deterioration caused by an electricfield in the case of a high radio frequency (hereinafter referred to asRF) output operation described in GaAs IC symposium (1995), pp81-84 andGaAs IC symposium (1994), pp259-262. Particularly it is demanded of highfrequency transistors to have high frequency characteristics andelemental dimensions such as a gate length and a channel depth aretherefore designed to be smaller. When such an element is operated underhigh voltage, the electric field becomes very high and therefore acharacteristic deterioration caused by the electric field is easilycaused. For example, GaAs PHEMTs are reduced in output in a RFreliability test performed at room temperature and the temperature ofthese devices become high when they are operated as described in theGaAs MANTECH (1997), pp42-45.

Also, in a high electron mobility transistor which is provided with afirst semiconductor layer having a narrow band gap and a secondsemiconductor layer having a wide band gap and in which atwo-dimensional electron gas channel is formed at the boundary betweenthe first semiconductor layer and the second semiconductor layer, athird semiconductor layer as a gate section which forms a p-n junctionbetween itself and the second semiconductor layer and has a conductorlower end higher than that of the second semiconductor layer in theenergy band structure to constitute a barrier is disposed on the secondsemiconductor layer, thereby constituting the transistor, as describedin Japanese Laid-Open Patent Publication No. 64-36080. Further, there isa compound semiconductor device in which a compound semiconductor layer(energy barrier layer) having a larger band gap than a carrier supplylayer and a buffer layer is inserted into these layers to thereby forman energy barrier against carriers thereby decreasing leak current andalso improving low noise properties as described in Japanese Laid-OpenPatent Publication No. 6-244218. Also, there is a high electron mobilitytransistor in which a layer having a large forbidden band width isformed in the carrier supply layer to prevent inflow of holes asdescribed in Japanese Laid-open Patent Publication No. 9-205196.

The deterioration mechanism of a PHEMT is considered to be as follows.First, hot carriers of hot electrons or hot holes having high energy dueto impact ionization when the PHEMT is operated in a high electric fieldis generated. These hot carriers reach the surface of a semiconductordevice and deteriorate the surface. In the case where these hot carriersare hot electrons, they are trapped by a surface passivation film and adepletion layer is widened by the negative charge, causing channelcontraction. Alternatively, the hot carriers may cause damage to thesurface of the semiconductor device. As a consequence, the Imax valuedrops, so that the characteristics of the PHEMT are deteriorated. Thisdeterioration mechanism becomes more significant with an increasedelectric field. Also, because impact ionization energy is large in InPtype HEMT or metamorphic HEMT which improves high frequencycharacteristics, the deterioration characteristics is significant.

SUMMARY OF THE INVENTION

It is an object of the present invention to restrict the characteristicdeterioration caused by an electric field in the semiconductor devicesuch as a MESFET and a PHEMT.

In accordance with one aspect of the present invention, there is asemiconductor device including a semiconductor substrate, a channellayer formed on the semiconductor substrate, a Schottky layer formed onthe channel layer, a first layer having a narrower band gap than theSchottky layer, a second layer having band discontinuity with theSchottky layer, a gate electrode disposed on the Schottky layer, n+layer formed on the Schottky layer on both sides of the gate electrode,the n+ layer having discontinuous parts positioned on the gateelectrode, a source electrode formed on the first n+ layer, and a drainelectrode formed on the second n+ layer. The first and second layers areinserted in the Schottky layer, and the second layer is disposed on thefirst layer.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will become readily understood from the followingdescription of preferred embodiments thereof made with reference to theaccompanying drawings, in which like parts are designated by likereference numeral, and in which:

FIG. 1 is a sectional view of a semiconductor device according to afirst embodiment of the present invention;

FIG. 2 is a schematic view of a process in which hot carriers are madeto be recombined and to become extinct by a barrier layer and arecombination layer in the semiconductor device shown in FIG. 1;

FIG. 3 is a sectional view of a semiconductor device according to asecond embodiment of the present invention;

FIG. 4 is a schematic view of a process of flowing hot holes under abarrier layer into a source electrode by a p+ layer formed under thesource electrode in the semiconductor device shown in FIG. 3;

FIG. 5 is a sectional view of a semiconductor device according to athird embodiment of the present invention;

FIG. 6 is a sectional view of a semiconductor device according to afourth embodiment of the present invention;

FIG. 7 is a sectional view of a semiconductor device according to afifth embodiment of the present invention; and

FIG. 8 is a sectional view of a semiconductor device according to asixth embodiment of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

A semiconductor device according to an embodiment of the presentinvention will be explained with reference to accompanying drawings. Itis to be noted that in these drawings, the same symbols are affixed tosubstantially the same parts.

First Embodiment

A semiconductor device according to a first embodiment of the presentinvention will be explained with reference to FIG. 1 and FIG. 2. FIG. 1is a sectional view of the semiconductor device. This semiconductordevice is a pseudomorphic high electron mobility transistor (PHEMT)using InGaAs layer as the channel layer. Also, in this semiconductordevice, an AlGaAs buffer layer 9, a lower electron supply layer 8 dopedwith Si, an InGaAs channel layer 7, an upper electron supply layer 6doped with Si and AlGaAs Schottky layers 5 a and 5 b are laminated inthis order on a GaAs substrate 10. This semiconductor device ischaracterized in that, further, a recombination layer 12 and a barrierlayer 11 disposed on the recombination layer 12 are sandwiched betweentwo Schottky layers 5 a and 5 b. A gate electrode 1 is disposed on theSchottky layer 5 b. Also, a source electrode 2 and a drain electrode 3are respectively disposed apart in the opposite directions from the gateelectrode 1 above the Schottky layer 5 b through an n+ GaAs layer 4.

Here, as the Schottky layer 5, an AlGaAs layer in which the mol ratio ofAl is 0.24 or less is usually used. Also, the barrier layer 11 is madeof a semiconductor material having bands (ΔEc and ΔEv) discontinuous tothe Schottky layer 5 and has a barrier effect on carriers such as holesor electrons. As the barrier layer 11, an AlGaAs layer or InGaP layer inwhich the mol ratio of Al is 0.4 or more which is higher than that ofthe Schottky layer 5 may be used. Further, the recombination layer 12 ismade of a material having a narrower band gap than the Schottky layer 5.As the recombination layer 12, for example, an InGaAs layer doped withoxygen may be used. A layer having a lattice defect in the interface orwithin the layer may also be used as the recombination layer 12.

Next, the effect obtained by the recombination layer 12 and the barrierlayer 11 disposed between the Schottky layers 5 a and 5 b will beexplained with reference to FIG. 2. FIG. 2 is a schematic view showing aprocess in which hot carriers generated in the channel layer 4 due to ahigh electric field become extinct in the recombination layer 12 in ahigh RF output operation. Since the barrier layer 11 exists, these hotcarriers generated due to a high electric field does not reach thesurface above the barrier layer 11 and the deterioration of the surfacecaused by the hot carriers is therefore suppressed. Also, the hotcarriers intercepted by the barrier layer 11 become extinct by therecombination of holes and electrons in the recombination layer 12disposed under the barrier 11. In the case where there is norecombination layer 12, it is considered that when the hot carriers, forexample, hot holes, intercepted by the barrier layer 11 are accumulatedunder the barrier layer, this causes a drop in potential and an increasein Ids, giving rise to a kink waveform. In this semiconductor device, asurface deterioration caused by hot carriers is prevented and theaccumulation of the hot carriers can be avoided by providing the barrierlayer 11 and the recombination layer 12 under the barrier layer.

It should be noted that each electrode may be covered with insulatorwith keeping a contact face. The semiconductor device may be packagedwithin a case.

Second Embodiment

A semiconductor device according to a second embodiment of the presentinvention will be explained with reference to FIG. 3 and FIG. 4. FIG. 3is a sectional view of this semiconductor device. This semiconductordevice is characterized in that a recombination layer 12 and a barrierlayer 11 disposed on the recombination layer 12 are sandwiched betweentwo Schottky layers 5 a and 5 b. The semiconductor device is alsocharacterized in that a p+ contact layer 15 is disposed under a sourceelectrode 2, the p+ contact layer 15 penetrating through an n+ layer 4,the Schottky layer 5 a, the barrier layer 11 and the recombination layer12 and connecting the source electrode 2 with the Schottky layer 5 b.This p+ contact layer 15 is formed by ion implantation using a p-typedopant Mg, C or the like.

Next, explanations will be furnished as to the effect of the p+ contactlayer 15 with reference to FIG. 4. FIG. 4 is a schematic view showing aprocess of flowing a hot hole 26 existing under the barrier layer 11into the source electrode 2 by the p+ contact layer 15 disposed underthe source electrode 2. For this, the accumulation of holes under thebarrier layer 11 is restricted.

Third Embodiment

A semiconductor device according to a third embodiment of the presentinvention will be explained with reference to FIG. 5. FIG. 5 is asectional view of this semiconductor device. This semiconductor deviceis characterized in that an n-type-doped layer 13 and a p-type-dopedlayer 14 disposed under the n-type-doped layer 13 are placed betweenSchottky layers 5 a and 5 b. Since the n-type-doped layer 13 islaminated on the p-type-doped layer 14, potential is dropped in then-type-doped layer 13 and potential is raised in the p-type-doped layer14, causing band discontinuity. For this, the semiconductor device hasan barrier effect on hot holes.

Fourth Embodiment

A semiconductor device according to a fourth embodiment of the presentinvention will be explained with reference to FIG. 6. FIG. 6 is asectional view of this semiconductor device. This semiconductor deviceis characterized in that an n-type-doped layer 13 and a p-type-dopedlayer 14 disposed on the n-type-doped layer 13 are sandwiched betweentwo Schottky layers 5 a and 5 b. The semiconductor device is alsocharacterized by the provision of a via-hole 16 penetrating from asource electrode 2 to a GaAs substrate 10. This via-hole 16 ensures thatholes intercepted by the n-type-doped layer 13 and the p-type-dopedlayer 14 flow from the via-hole 16 to the source electrode. Thisrestricts the accumulation of hot holes.

Although, in this example, the via-hole 16 is opened from the surface ofthe GaAs substrate 10 and is penetrated up to the source electrode 2, itmay be opened from the source electrode 2 and penetrated up to the GaAssubstrate 10.

Fifth Embodiment

A semiconductor device according to a fifth embodiment of the presentinvention will be explained with reference to FIG. 7. FIG. 7 is asectional view of this semiconductor device. In this semiconductordevice, an AlGaAs buffer layer 9, a lower electron supply layer 8 dopedwith Si, an InGaAs channel layer 7, an upper electron supply layer 6doped with Si and an AlGaAs Schottky layer 5 are laminated in this orderon a GaAs substrate 10. Also, a gate electrode 1 is disposed on theSchottky layer 5. Also, a source electrode 2 and a drain electrode 3 arerespectively disposed apart in the opposite directions from the gateelectrode 1 above the Schottky layer 5 through an n+ GaAs layer 4. TheInGaAs layer 18 covers the surface of the Schottky layer 5.

Next, a surface deterioration caused by an electric field arises on thesurface of the Schottky layer 5. On the other hand, a compoundsemiconductor containing phosphorus (P) such as InGaP semiconductor andthe like is more resistant to oxidation than compound semiconductorssuch as compound semiconductors containing arsenic (As) such as GaAs andAlGaAs semiconductors. Also, InGaP has large band discontinuity (ΔEv) ina valence band and therefore has a barrier effect upon hot holes.Moreover, InGaP is resistant to surface oxidation. Then, the surface ofthe Schottky layer 5 is covered with the InGaP layer 18, whereby thesurface deterioration can be limited. In the production of thissemiconductor device, InGaP having a specific form as shown in FIG. 7 isformed by selective etching of InGaP differing in etching rate from GaAsand AlGaAs.

Sixth Embodiment

A semiconductor device according to a sixth embodiment of the presentinvention will be explained with reference to FIG. 8. FIG. 8 is asectional view of this semiconductor device. In this semiconductordevice, an AlGaAs buffer layer 9, a lower electron supply layer 8 dopedwith Si, an InGaAs channel layer 7, an upper electron supply layer 6doped with Si and an AlGaAs Schottky layer 5 are laminated in this orderon a GaAs substrate 10. Also, a gate electrode 1 is disposed on theSchottky layer 5. Also, a source electrode 2 and a drain electrode 3 arerespectively disposed apart in the opposite directions from the gateelectrode 1 above the Schottky layer 5 through an n− GaAs layer 19sandwiched between two InGaP layers 17 and 18 and an n+ GaAs layer 4.The InGaAs layer 18 covers the surface of the Schottky layer 5.

Explanations will be furnished as to the effect obtained by providingthe n− GaAs layer 19 sandwiched between these two InGaP layers 17 and 18and the n+ GaAs layer 4. Like the explanations in the fifth embodiment,a surface deterioration caused by a high electric field is restricted bycovering the surface of the Schottky layer 5 and the surface of the n−GaAs layer 19 with InGaP layer 7 and 18.

It is to be noted that although the explanations are furnished taking aGaAs PHEMT as an example, the present invention is not limited to thistransistor and is applicable to semiconductors having a FET(field-effect transistor) structure such as MESFETs, InP type HEMTs andmetamorphic HEMTs.

The semiconductor device according to the present invention is providedwith a recombination layer and a barrier layer disposed on therecombination layer between two Schottky layers. In an RF high outputoperation, hot carriers generated in a channel layer due to a highelectric field are intercepted by the barrier layer, so that they do notreach the surface above the barrier layer. For this, a surfacedeterioration caused by these hot carriers can be restricted. Also, thehot carriers intercepted by the barrier layer become extinct resultingfrom the recombination of holes with electrons in a recombination layerdisposed under the barrier layer, whereby the accumulation of these hotcarriers can be prevented.

Although the present invention has been described in connection with thepreferred embodiments thereof with reference to the accompanyingdrawings, it is to be noted that various changes and modifications areapparent to those skilled in the art. Such changes and modifications areto be understood as included within the scope of the present inventionas defined by the appended claims, unless they depart therefrom.

1-5. (canceled)
 6. A semiconductor device comprising: a channel layer ona semiconductor substrate; a Schottky layer on the channel layer; a gateelectrode disposed on the Schottky layer; a compound semiconductor layercontaining phosphorus and covering the Schottky layer; first and secondn+ layers on the compound semiconductor layer containing phosphorus, onopposite sides of the gate electrode; a source electrode on the first n+layer; and a drain electrode on the second n+ layer.
 7. Thesemiconductor device according to claim 6, further comprising: a firstpair of first and second compound semiconductor layers containingphosphorus sandwiching the first n+ layer; and a second pair of firstand second compound semiconductor layers containing phosphorus andsandwiching the second n+ layer.
 8. The semiconductor device accordingto claim 6, further comprising: a first pair of first and secondcompound semiconductor layers containing phosphorus sandwiched betweenthe first n+ layer and the Schottky layer; a first n− layer sandwichedbetween the first pair of first and second compound semiconductor layerscontaining phosphorus. a second pair of first and second compoundsemiconductor layers containing phosphorus sandwiched between the secondn+ layer and the Schottky layer; and a second n− layer sandwichedbetween the second pair of first and second compound semiconductorlayers containing phosphorus.
 9. The semiconductor device according toclaim 6, wherein the compound semiconductor layer containing phosphorusis InGaP.
 10. (canceled)